Isolating individual components of nanoscale architectures comprised of thin films or nanostructures, without significantly impacting their functionalities, is a critical challenge in micro- and nano-scale device fabrication. One example that illustrates this challenge is seen in Cu interconnect structures for 100 nanometer devices.
A schematic cross-section of a typical copper interconnect structure is shown in FIG. 1(a). FIG. 1(a) shows copper layers 24 interconnected by copper-filled vias 20. Dielectric layers 22 are between the copper layers 24. Barrier layers 28 isolate the copper layers 24 and the copper in the vias 20 from the dielectric layers 22. Without the barrier layers 28, as shown in FIG. 1(b), the copper in a copper layer 24 can diffuse into an adjacent dielectric layer 22 (as shown by the arrows), thus degrading the dielectric properties of the dielectric layer 22.
Some currently used interfacial barrier layer materials include Ta, TaN and TiN. When these layers are deposited by conventional methods, they are difficult to form as uniform and continuous layers. This is especially true when the layers to be deposited are less than 10 nanometers thick, and when the layers are formed in high aspect ratio (e.g., depth to width) features such as vias. This is illustrated schematically in FIG. 1(c). FIG. 1(c) shows a barrier layer 26 that has been vapor deposited in a via. The barrier layer 26 has a non-uniform thickness. Copper 24 fills the remainder of the via. As shown in FIG. 1(c), an uneven barrier layer 26 may have gaps 25 and may not act as a complete barrier between the copper 24 and the dielectric layer 22. Copper 24 can diffuse into the gaps and into the dielectric layer 22. While a thicker barrier layer could be deposited to compensate for the uneven thickness of the barrier layer 26 in a high aspect ratio via, the thicker barrier layer takes up the space meant for low-resistivity Cu, thus neutralizing the advantages of miniaturization.
Newly emerging methods such as atomic layer deposition have the potential to obviate some of these concerns. However, even if 5 nanometer thick conformal films (or thinner conformal films) of conventional barrier materials could be reliably produced, it is not clear if they will be effective. High defect densities and fast diffusion paths such as nanopipes can limit the effectiveness of thin metal barrier layers. Hence, there is a great deal of interest in finding alternative materials and processing methods that solve these problems.
Another problem to be addressed is the potential delamination between a barrier layer and an adjacent copper layer. If a copper layer and barrier layer delaminate, for example in an interconnect structure, the resulting separation could eventually result in the failure of the semiconductor device that uses the interconnect structure.
Embodiments of the invention address these and other problems.